An advanced course on design of VLSI circuits for data communications over wire channels. The theoretical component consists of: switching noise and grounding of mixed analog-digital circuits, modeling of wire channels, clock generation and distribution, power distribution on chip, ESD protection, channel equalization, clock and data recovery. The laboratory component consists of design of clock and data recovery circuits using state-of-the-art CMOS technology and CAD tools.
Weekly Contact: Lab:1 hr. Lecture:3 hrs.
GPA Weight: 1.00
Course Count: 1.00
Billing Units: 1